1. 14 Jan, 2015 6 commits
    • Yuri Kunde Schlesner's avatar
      GPU: Fix buffer overrun in Display Transfers · a09f7152
      Yuri Kunde Schlesner authored
      Display transfers with the horizontal downscaling flag were calculating
      the wrong output size, causing them to write double the amount of data
      intended. It is likely that this was perceived as correct due to a
      separate bug in calculating source indices which caused the image to be
      padded unless the previous bug was present.
      
      This fixes both issues, correcting flickering issues in 3dscraft,
      blargSnes and more (caused by the transfer overwriting the back buffer
      which followed) as well as potentially fixing other crashes.
      a09f7152
    • Yuri Kunde Schlesner's avatar
      GSP: Fix appending of interrupts to the shared memory buffer · 7630b316
      Yuri Kunde Schlesner authored
      The code was previously appending the interrupt to after the end of the
      buffer, instead of at the end.
      7630b316
    • Yuri Kunde Schlesner's avatar
      9e084826
    • Yuri Kunde Schlesner's avatar
      GPU: Correct wrong default framebuffer address for sub-screen. · e29dd76e
      Yuri Kunde Schlesner authored
      It appears this is a mistake, since the sub-screen has no right
      framebuffer.
      e29dd76e
    • Yuri Kunde Schlesner's avatar
      GSP: Update framebuffer info on all interrupts · 5961a285
      Yuri Kunde Schlesner authored
      Hardware testing determined that the GSP processes shared memory
      framebuffer update info even when no memory transfer or filling GX
      commands are used. They are now updated on every interrupt, which isn't
      confirmed correct but matches hardware behaviour more closely.
      
      This also reverts the hack introduced in #404. It made a few games
      behave better, but I believe it's incorrect and also breaks other games.
      5961a285
    • Yuri Kunde Schlesner's avatar
      GPU: Fire GPU interrupts at the correct places. · 98e32749
      Yuri Kunde Schlesner authored
      PDC0 and PDC1 are both VBlank interrupts. PDC0 was being treated as a
      HBlank interrupt and fired many more times than it should. They now both
      fire together at 60 Hz. This puzzlingly *improves* apparent framerate on
      many applications.
      
      A few other interrupts were being fired inside the GSP command
      processing instead of on the actual GPU register writes, so they were
      moved there, which should cover direct writes tho those registers not
      going through the GX command queue.
      98e32749
  2. 13 Jan, 2015 7 commits
  3. 12 Jan, 2015 18 commits
  4. 11 Jan, 2015 9 commits