Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
V
vivado-wrapper
Manage
Activity
Members
Labels
Plan
Issues
0
Issue boards
Milestones
Wiki
Code
Merge requests
0
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package Registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Terms and privacy
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Recolic
vivado-wrapper
Commits
8fb08780
There was an error fetching the commit references. Please try again later.
Unverified
Commit
8fb08780
authored
5 years ago
by
Recolic Keghart
Browse files
Options
Downloads
Patches
Plain Diff
fix vwc template error
parent
95ba0cce
No related branches found
No related tags found
No related merge requests found
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
template/xc7a100tcsg324-1.vwc
+58
-58
58 additions, 58 deletions
template/xc7a100tcsg324-1.vwc
vivado-wrapper
+1
-1
1 addition, 1 deletion
vivado-wrapper
with
59 additions
and
59 deletions
template/xc7a100tcsg324-1.vwc
+
58
−
58
View file @
8fb08780
...
...
@@ -79,17 +79,17 @@
#vwc_port P2 led[15]
##Bank = 34, Pin name = IO_L5P_T0_34,Sch name = LED16_R
#vwc_port K5 GB1_Red
]
#vwc_port K5
R
GB1_Red
##Bank = 15, Pin name = IO_L5P_T0_AD9P_15,Sch name = LED16_G
#vwc_port F13 GB1_Green
]
#vwc_port F13
R
GB1_Green
##Bank = 35, Pin name = IO_L19N_T3_VREF_35,Sch name = LED16_B
#vwc_port F6 GB1_Blue
]
#vwc_port F6
R
GB1_Blue
##Bank = 34, Pin name = IO_0_34,Sch name = LED17_R
#vwc_port K6 GB2_Red
]
#vwc_port K6
R
GB2_Red
##Bank = 35, Pin name = IO_24P_T3_35,Sch name = LED17_G
#vwc_port H6 GB2_Green
]
#vwc_port H6
R
GB2_Green
##Bank = CONFIG, Pin name = IO_L3N_T0_DQS_EMCCLK_14,Sch name = LED17_B
#vwc_port L16 GB2_Blue
]
#vwc_port L16
R
GB2_Blue
...
...
@@ -110,7 +110,7 @@
#vwc_port L6 seg[6]
##Bank = 34, Pin name = IO_L16P_T2_34,Sch name = DP
#vwc_port M4 p
]
#vwc_port M4
d
p
##Bank = 34, Pin name = IO_L18N_T2_34,Sch name = AN0
#vwc_port N6 an[0]
...
...
@@ -133,17 +133,17 @@
##Buttons
##Bank = 15, Pin name = IO_L3P_T0_DQS_AD1P_15,Sch name = CPU_RESET
#vwc_port C12 tnCpuReset
]
#vwc_port C12
b
tnCpuReset
##Bank = 15, Pin name = IO_L11N_T1_SRCC_15,Sch name = BTNC
#vwc_port E16 tnC
]
#vwc_port E16
b
tnC
##Bank = 15, Pin name = IO_L14P_T2_SRCC_15,Sch name = BTNU
#vwc_port F15 tnU
]
#vwc_port F15
b
tnU
##Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14,Sch name = BTNL
#vwc_port T16 tnL
]
#vwc_port T16
b
tnL
##Bank = 14, Pin name = IO_25_14,Sch name = BTNR
#vwc_port R10 tnR
]
#vwc_port R10
b
tnR
##Bank = 14, Pin name = IO_L21P_T3_DQS_14,Sch name = BTND
#vwc_port V10 tnD
]
#vwc_port V10
b
tnD
...
...
@@ -273,21 +273,21 @@
##Bank = 35, Pin name = IO_L3P_T0_DQS_AD5P_35,Sch name = VGA_G3
#vwc_port A6 vgaGreen[3]
##Bank = 15, Pin name = IO_L4P_T0_15,Sch name = VGA_HS
#vwc_port B11 sync
]
#vwc_port B11
H
sync
##Bank = 15, Pin name = IO_L3N_T0_DQS_AD1N_15,Sch name = VGA_VS
#vwc_port B12 sync
]
#vwc_port B12
V
sync
##Micro SD Connector
##Bank = 35, Pin name = IO_L14P_T2_SRCC_35,Sch name = SD_RESET
#vwc_port E2 dReset
]
#vwc_port E2
s
dReset
##Bank = 35, Pin name = IO_L9N_T1_DQS_AD7N_35,Sch name = SD_CD
#vwc_port A1 dCD
]
#vwc_port A1
s
dCD
##Bank = 35, Pin name = IO_L9P_T1_DQS_AD7P_35,Sch name = SD_SCK
#vwc_port B1 dSCK
]
#vwc_port B1
s
dSCK
##Bank = 35, Pin name = IO_L16N_T2_35,Sch name = SD_CMD
#vwc_port C1 dCmd
]
#vwc_port C1
s
dCmd
##Bank = 35, Pin name = IO_L16P_T2_35,Sch name = SD_DAT0
#vwc_port C2 sdData[0]
##Bank = 35, Pin name = IO_L18N_T2_35,Sch name = SD_DAT1
...
...
@@ -301,94 +301,94 @@
##Accelerometer
##Bank = 15, Pin name = IO_L6N_T0_VREF_15,Sch name = ACL_MISO
#vwc_port D13 clMISO
]
#vwc_port D13
a
clMISO
##Bank = 15, Pin name = IO_L2N_T0_AD8N_15,Sch name = ACL_MOSI
#vwc_port B14 clMOSI
]
#vwc_port B14
a
clMOSI
##Bank = 15, Pin name = IO_L12P_T1_MRCC_15,Sch name = ACL_SCLK
#vwc_port D15 clSCK
]
#vwc_port D15
a
clSCK
##Bank = 15, Pin name = IO_L12N_T1_MRCC_15,Sch name = ACL_CSN
#vwc_port C15 clSS
]
#vwc_port C15
a
clSS
##Bank = 15, Pin name = IO_L20P_T3_A20_15,Sch name = ACL_INT1
#vwc_port C16 clInt1
]
#vwc_port C16
a
clInt1
##Bank = 15, Pin name = IO_L11P_T1_SRCC_15,Sch name = ACL_INT2
#vwc_port E15 clInt2
]
#vwc_port E15
a
clInt2
##Temperature Sensor
##Bank = 15, Pin name = IO_L14N_T2_SRCC_15,Sch name = TMP_SCL
#vwc_port F16 mpSCL
]
#vwc_port F16
t
mpSCL
##Bank = 15, Pin name = IO_L13N_T2_MRCC_15,Sch name = TMP_SDA
#vwc_port G16 mpSDA
]
#vwc_port G16
t
mpSDA
##Bank = 15, Pin name = IO_L1P_T0_AD0P_15,Sch name = TMP_INT
#vwc_port D14 mpInt
]
#vwc_port D14
t
mpInt
##Bank = 15, Pin name = IO_L1N_T0_AD0N_15,Sch name = TMP_CT
#vwc_port C14 mpCT
]
#vwc_port C14
t
mpCT
##Omnidirectional Microphone
##Bank = 35, Pin name = IO_25_35,Sch name = M_CLK
#vwc_port J5 icClk
]
#vwc_port J5
m
icClk
##Bank = 35, Pin name = IO_L24N_T3_35,Sch name = M_DATA
#vwc_port H5 icData
]
#vwc_port H5
m
icData
##Bank = 35, Pin name = IO_0_35,Sch name = M_LRSEL
#vwc_port F5 icLRSel
]
#vwc_port F5
m
icLRSel
##PWM Audio Amplifier
##Bank = 15, Pin name = IO_L4N_T0_15,Sch name = AUD_PWM
#vwc_port A11 mpPWM
]
#vwc_port A11
a
mpPWM
##Bank = 15, Pin name = IO_L6P_T0_15,Sch name = AUD_SD
#vwc_port D12 mpSD
]
#vwc_port D12
a
mpSD
##USB-RS232 Interface
##Bank = 35, Pin name = IO_L7P_T1_AD6P_35,Sch name = UART_TXD_IN
#vwc_port C4 sRx
]
#vwc_port C4
R
sRx
##Bank = 35, Pin name = IO_L11N_T1_SRCC_35,Sch name = UART_RXD_OUT
#vwc_port D4 sTx
]
#vwc_port D4
R
sTx
##Bank = 35, Pin name = IO_L12N_T1_MRCC_35,Sch name = UART_CTS
#vwc_port D3 sCts
]
#vwc_port D3
R
sCts
##Bank = 35, Pin name = IO_L5N_T0_AD13N_35,Sch name = UART_RTS
#vwc_port E5 sRts
]
#vwc_port E5
R
sRts
##USB HID (PS/2)
##Bank = 35, Pin name = IO_L13P_T2_MRCC_35,Sch name = PS2_CLK
#vwc_port F4 S2Clk
]
#vwc_port F4
P
S2Clk
##Bank = 35, Pin name = IO_L10N_T1_AD15N_35,Sch name = PS2_DATA
#vwc_port B2 S2Data
]
#vwc_port B2
P
S2Data
##SMSC Ethernet PHY
##Bank = 16, Pin name = IO_L11P_T1_SRCC_16,Sch name = ETH_MDC
#vwc_port C9 hyMdc
]
#vwc_port C9
P
hyMdc
##Bank = 16, Pin name = IO_L14N_T2_SRCC_16,Sch name = ETH_MDIO
#vwc_port A9 hyMdio
]
#vwc_port A9
P
hyMdio
##Bank = 35, Pin name = IO_L10P_T1_AD15P_35,Sch name = ETH_RSTN
#vwc_port B3 hyRstn
]
#vwc_port B3
P
hyRstn
##Bank = 16, Pin name = IO_L6N_T0_VREF_16,Sch name = ETH_CRSDV
#vwc_port D9 hyCrs
]
#vwc_port D9
P
hyCrs
##Bank = 16, Pin name = IO_L13N_T2_MRCC_16,Sch name = ETH_RXERR
#vwc_port C10 hyRxErr
]
#vwc_port C10
P
hyRxErr
##Bank = 16, Pin name = IO_L19N_T3_VREF_16,Sch name = ETH_RXD0
#vwc_port D10 PhyRxd[0]
##Bank = 16, Pin name = IO_L13P_T2_MRCC_16,Sch name = ETH_RXD1
#vwc_port C11 PhyRxd[1]
##Bank = 16, Pin name = IO_L11N_T1_SRCC_16,Sch name = ETH_TXEN
#vwc_port B9 hyTxEn
]
#vwc_port B9
P
hyTxEn
##Bank = 16, Pin name = IO_L14P_T2_SRCC_16,Sch name = ETH_TXD0
#vwc_port A10 PhyTxd[0]
##Bank = 16, Pin name = IO_L12N_T1_MRCC_16,Sch name = ETH_TXD1
#vwc_port A8 PhyTxd[1]
##Bank = 35, Pin name = IO_L11P_T1_SRCC_35,Sch name = ETH_REFCLK
#vwc_port D5 hyClk50Mhz
]
#vwc_port D5
P
hyClk50Mhz
##Bank = 16, Pin name = IO_L12P_T1_MRCC_16,Sch name = ETH_INTN
#vwc_port B8 hyIntn
]
#vwc_port B8
P
hyIntn
...
...
@@ -404,29 +404,29 @@
##Bank = CONFIG, Pin name = IO_L2P_T0_D03_14,Sch name = QSPI_DQ3
#vwc_port M14 QspiDB[3]
##Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14,Sch name = QSPI_CSN
#vwc_port L13 spiCSn
]
#vwc_port L13
Q
spiCSn
##Cellular RAM
##Bank = 14, Pin name = IO_L14N_T2_SRCC_14,Sch name = CRAM_CLK
#vwc_port T15 amCLK
]
#vwc_port T15
R
amCLK
##Bank = 14, Pin name = IO_L23P_T3_A03_D19_14,Sch name = CRAM_ADVN
#vwc_port T13 amADVn
]
#vwc_port T13
R
amADVn
##Bank = 14, Pin name = IO_L4P_T0_D04_14,Sch name = CRAM_CEN
#vwc_port L18 amCEn
]
#vwc_port L18
R
amCEn
##Bank = 15, Pin name = IO_L19P_T3_A22_15,Sch name = CRAM_CRE
#vwc_port J14 amCRE
]
#vwc_port J14
R
amCRE
##Bank = 15, Pin name = IO_L15P_T2_DQS_15,Sch name = CRAM_OEN
#vwc_port H14 amOEn
]
#vwc_port H14
R
amOEn
##Bank = 14, Pin name = IO_0_14,Sch name = CRAM_WEN
#vwc_port R11 amWEn
]
#vwc_port R11
R
amWEn
##Bank = 15, Pin name = IO_L24N_T3_RS0_15,Sch name = CRAM_LBN
#vwc_port J15 amLBn
]
#vwc_port J15
R
amLBn
##Bank = 15, Pin name = IO_L17N_T2_A25_15,Sch name = CRAM_UBN
#vwc_port J13 amUBn
]
#vwc_port J13
R
amUBn
##Bank = 14, Pin name = IO_L14P_T2_SRCC_14,Sch name = CRAM_WAIT
#vwc_port T14 amWait
]
#vwc_port T14
R
amWait
##Bank = 14, Pin name = IO_L5P_T0_DQ06_14,Sch name = CRAM_DQ0
#vwc_port R12 MemDB[0]
...
...
This diff is collapsed.
Click to expand it.
vivado-wrapper
+
1
−
1
View file @
8fb08780
...
...
@@ -3,7 +3,7 @@
_vw_bin_name
=
"
$0
"
_vw_version_major
=
"1"
_vw_version_minor
=
"
4
"
_vw_version_minor
=
"
5
"
_vw_version_ext
=
""
_vw_version
=
"
${
_vw_version_major
}
.
${
_vw_version_minor
}${
_vw_version_ext
}
"
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment