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Unverified Commit 890519c8 authored by Recolic Keghart's avatar Recolic Keghart
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add vwc support. fix a tiny unfound bug(without harm).

parent 78ffd5c7
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......@@ -3,3 +3,4 @@ template/*
!template/Vivadofile
!template/*.xdc
*.bit
......@@ -10,6 +10,8 @@
- Burn auto saved built binary at anytime and any machine.
- Built-in support to an extremely simple constraint file format: `.vwc`.
- Full vivado GUI support.
- Support every hardware supported by vivado.
......@@ -68,6 +70,6 @@ vivadow gui
## Notice
This is a bash script, so it can be easily injected. Never trust Vivadofile uploaded by others!
This is a bash script, so it can be easily injected. `Vivadofile` and `.vwc` constraint will be directly `source`d. **Never** trust Vivadofile uploaded by others!
If you give a wrong top\_module name, *silly vivado* will accept it, and generate bitstream for a **randomly-taken** module(with long time spent), then report error.
# Optional options
# vivado_exec="/home/recolic/extraDisk/xilinx/Vivado/2018.1/bin/vivado"
thread_num=4
#
# Required options
#
# You may use SystemVerilog, Verilog, or VHDL files as sources.
# sources=(test_main.sv lib/* ./mod?.v)
sources=(test_main.sv lib/* ./mod?.v)
# The directory where generated bitstream is put
bit_dir=./build
# All of your top_modules and its constraint files.
# top_modules=(
# "test_main:constraint/test_main.xdc"
# "mod1:constraint/mod1.vwc"
# )
top_modules=(
"test_main:constraint/test_main.xdc"
"mod1:constraint/mod1.xdc"
"mod1:constraint/mod1.vwc"
)
# Your default top_module. Maybe override by commandline option.
# top_module=test_main
top_module=test_main
# Name of your board in vivado. HUST uses 'xc7a100tcsg324-1' by default.
board="xc7a100tcsg324-1"
#
# Optional options
#
# Path to vivado executable. It will override environment variable `vivado_exec`
# vivado_exec="/path/to/vivado"
# It's recommanded to set thread_num to cores of your CPU.
thread_num=4
vwc_port P4 i
vwc_port T8 j
set_property PACKAGE_PIN P4 [get_ports {i}]
set_property IOSTANDARD LVCMOS33 [get_ports {i}]
set_property PACKAGE_PIN T8 [get_ports {j}]
set_property IOSTANDARD LVCMOS33 [get_ports {j}]
\ No newline at end of file
This diff is collapsed.
......@@ -12,7 +12,7 @@ bit_dir=./build
# All of your top_modules and its constraint files.
# top_modules=(
# "test_main:constraint/test_main.xdc"
# "mod1:constraint/mod1.xdc"
# "mod1:constraint/mod1.vwc"
# )
top_modules=(
......
This diff is collapsed.
......@@ -3,7 +3,7 @@
_vw_bin_name="$0"
_vw_version_major="1"
_vw_version_minor="1"
_vw_version_minor="2"
_vw_version="${_vw_version_major}.${_vw_version_minor}"
[[ $_vw_version_major == 0 ]] && echo "Vivado wrapper is unfinished, and unable to work." && exit 11
......@@ -113,6 +113,7 @@ function import_vivadofile () {
function get_constraint_of_module () {
# stdout of this function is used as return val.
# Given module name, echo full constr path. Need vivadofile.
_mod_name="$1"
for _ele in "${top_modules[@]}" ; do
_key=${_ele%%:*}
......@@ -129,21 +130,26 @@ function vivado_check_and_init_template () {
[[ -d "$my_path/template/$board" ]] && return 0
"$my_path/gen_tcl.sh" init-project temp_project "$my_path/template/$board" "$board" > $temp_dir/sh.tcl
"$vivado_exec" -mode batch -source "$temp_dir/sh.tcl" -nojournal -nolog
rm -f "$my_path/template/$board/temp_project/temp_project.srcs/constrs_1/new/constraint.xdc"
rm "$my_path/template/$board/temp_project.srcs/constrs_1/new/constraint.xdc"
rm -rf "$my_path/template/$board/temp_project.cache/"*
}
function generate_real_project () {
[[ "$constr_path" == '' ]] && constr_path="$(pwd)/$(get_constraint_of_module $top_module)"
# Init the real project
vivado_check_and_init_template || return 4
cp -r "$my_path/template/"* "$temp_dir/"
ln -s "$temp_dir/$board" "$temp_dir/project"
# Convert vwc constraints to xdc here
[[ "$constr_path" == '' ]] && constr_path="$(pwd)/$(get_constraint_of_module $top_module)"
[[ ${constr_path: -4} == ".vwc" ]] && "$my_path/vwc2xdc.sh" "$constr_path" > "$temp_dir/generated.xdc" && constr_path="$temp_dir/generated.xdc"
# Move sources and constraints
_real_proj_src="$temp_dir/project/temp_project.srcs"
for src in `echo ${sources[@]}`; do
mkdir -p "$_real_proj_src/sources_1/new/$(dirname "$src")"
ln -s "$(pwd)/$src" "$_real_proj_src/sources_1/new/$src"
done
rm -f "$_real_proj_src/constrs_1/new/constraint.xdc"
ln -s "$constr_path" "$_real_proj_src/constrs_1/new/constraint.xdc"
echo "real_project generated at $temp_dir"
}
......@@ -165,6 +171,7 @@ function do_init () {
cp_with_backup "$my_path"/template/Vivadofile ./Vivadofile
echo "I'll provide a constraint file for xc7a100tcsg324-1, which is used by HUST students. Remove it if it's not your case."
cp_with_backup "$my_path"/template/xc7a100tcsg324-1.xdc ./constraint/xc7a100tcsg324-1.xdc
cp_with_backup "$my_path"/template/xc7a100tcsg324-1.vwc ./constraint/xc7a100tcsg324-1.vwc
echo "Vivadow project inited."
}
......
#!/bin/bash
# Input a vwc, and give a xdc file. Used in vivado wrapper.
# vwc is a much easier format than xdc.
function vwc_cmd () {
echo $@
}
function vwc_port () {
echo "set_property PACKAGE_PIN $1 [get_ports {$2}]"
echo "set_property IOSTANDARD LVCMOS33 [get_ports {$2}]"
}
function vwc_clk () {
echo "create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports $1]"
}
[[ $1 == '' ]] && echo "Usage: $0 <path/to/constraint.vwc>" && exit 1
echo '# Generated by Vivado wrapper, licensed under GPL 3.0
# Copyright (C) Recolic Keghart <root@recolic.net>
'
source "$1"
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