typo fix

configure_input: Modify controller connection delay

typo fix

memory: Remove MemoryHook

Increases the controller connection delay to 60ms and refactors it to attempt to disconnect all controllers prior to connecting all controllers in HID.

core/memory: Read and write page table atomically

.ci/templates: Enable QT translation for MSVC CI

Make the coding conventions more consistant

Port citra-emu/citra#5509 "Look at direction of analog axis travel instead of instantaneous sample"

Service threads

lut_index had 0 added when nothing was supposed to be added

despite this, index was not added to 0 when nothing was supposed to be added...

half_set: Resolve -Wmaybe-uninitialized warnings

maxwell_to_vk: Initialize usage variable in SurfaceFormat()

Silences a -Wmaybe-uninitialized warning

cmake: Enforce -Wuninitialized

video_core/texture_cache: Rewrite the texture cache

The current texture cache has several points that hurt maintainability
and performance. It's easy to break unrelated parts of the cache
when doing minor changes. The cache can easily forget valuable
information about the cached textures by CPU writes or simply by its
normal usage.The current texture cache has several points that hurt
maintainability and performance. It's easy to break unrelated parts
of the cache when doing minor changes. The cache can easily forget
valuable information about the cached textures by CPU writes or simply
by its normal usage.

This commit aims to address those issues.

Add support for building SPIR-V shaders from GLSL and generating headers
to include the text of those same GLSL shaders to consume from OpenGL.

Squash attributes into the pointer's integer, making them an uintptr_t
pair containing 2 bits at the bottom and then the pointer. These bits
are currently unused thanks to alignment requirements.

Configure Dynarmic to mask out these bits on pointer reads.

While we are at it, remove some unused attributes carried over from
Citra.

Read/Write and other hot functions use a two step unpacking process that
is less readable to stop MSVC from emitting an extra AND instruction in
the hot path:

 mov         rdi,rcx
 shr         rdx,0Ch
 mov         r8,qword ptr [rax+8]
 mov         rax,qword ptr [r8+rdx*8]
 mov         rdx,rax
-and         al,3
 and         rdx,0FFFFFFFFFFFFFFFCh
 je          Core::Memory::Memory::Impl::Read<unsigned char>
 mov         rax,qword ptr [vaddr]
 movzx       eax,byte ptr [rdx+rax]

k_priority_queue: Fix concepts use

- This is to allow service threads to defer destruction of themselves.

Add missing include of "core/hle/kernel/kernel.h"