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Commit e8a17ee6 authored by bunnei's avatar bunnei
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arm: added option to prepare CPU core (while mid-instruction) for thread reschedule

parent 15c7d817
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...@@ -89,6 +89,9 @@ public: ...@@ -89,6 +89,9 @@ public:
*/ */
virtual void LoadContext(const ThreadContext& ctx) = 0; virtual void LoadContext(const ThreadContext& ctx) = 0;
/// Prepare core for thread reschedule (if needed to correctly handle state)
virtual void PrepareReschedule() = 0;
/// Getter for num_instructions /// Getter for num_instructions
u64 GetNumInstructions() { u64 GetNumInstructions() {
return num_instructions; return num_instructions;
......
...@@ -140,3 +140,8 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { ...@@ -140,3 +140,8 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
state->Reg[15] = ctx.pc; state->Reg[15] = ctx.pc;
state->NextInstr = RESUME; state->NextInstr = RESUME;
} }
/// Prepare core for thread reschedule (if needed to correctly handle state)
void ARM_Interpreter::PrepareReschedule() {
state->NumInstrsToExecute = 0;
}
...@@ -72,6 +72,9 @@ public: ...@@ -72,6 +72,9 @@ public:
*/ */
void LoadContext(const ThreadContext& ctx); void LoadContext(const ThreadContext& ctx);
/// Prepare core for thread reschedule (if needed to correctly handle state)
void PrepareReschedule();
protected: protected:
/** /**
......
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