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many-archive
Suyu
Commits
19d41dcc
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Commit
19d41dcc
authored
7 years ago
by
James Rowe
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Remove pipeline.gpu_mode and fix minor issues
parent
ad0b57f4
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1
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1 changed file
src/video_core/command_processor.cpp
+2
-12
2 additions, 12 deletions
src/video_core/command_processor.cpp
with
2 additions
and
12 deletions
src/video_core/command_processor.cpp
+
2
−
12
View file @
19d41dcc
...
@@ -245,7 +245,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
...
@@ -245,7 +245,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
g_state
.
geometry_pipeline
.
SubmitVertex
(
output
);
g_state
.
geometry_pipeline
.
SubmitVertex
(
output
);
// TODO: If drawing after every immediate mode triangle kills performance,
// TODO: If drawing after every immediate mode triangle kills performance,
// change it to flush triangles whenever a draing config register changes
// change it to flush triangles whenever a dra
w
ing config register changes
// See: https://github.com/citra-emu/citra/pull/2866#issuecomment-327011550
// See: https://github.com/citra-emu/citra/pull/2866#issuecomment-327011550
VideoCore
::
g_renderer
->
Rasterizer
()
->
DrawTriangles
();
VideoCore
::
g_renderer
->
Rasterizer
()
->
DrawTriangles
();
if
(
g_debug_context
)
{
if
(
g_debug_context
)
{
...
@@ -259,16 +259,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
...
@@ -259,16 +259,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
}
}
case
PICA_REG_INDEX
(
pipeline
.
gpu_mode
):
case
PICA_REG_INDEX
(
pipeline
.
gpu_mode
):
if
(
regs
.
pipeline
.
gpu_mode
==
PipelineRegs
::
GPUMode
::
Configuring
)
{
// This register likely just enables vertex processing and doesn't need any special handling
MICROPROFILE_SCOPE
(
GPU_Drawing
);
// Draw immediate mode triangles when GPU Mode is set to GPUMode::Configuring
VideoCore
::
g_renderer
->
Rasterizer
()
->
DrawTriangles
();
if
(
g_debug_context
)
{
g_debug_context
->
OnEvent
(
DebugContext
::
Event
::
FinishedPrimitiveBatch
,
nullptr
);
}
}
break
;
break
;
case
PICA_REG_INDEX_WORKAROUND
(
pipeline
.
command_buffer
.
trigger
[
0
],
0x23c
)
:
case
PICA_REG_INDEX_WORKAROUND
(
pipeline
.
command_buffer
.
trigger
[
0
],
0x23c
)
:
...
@@ -407,7 +398,6 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
...
@@ -407,7 +398,6 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
range
.
second
,
range
.
first
);
range
.
second
,
range
.
first
);
}
}
MICROPROFILE_SCOPE
(
GPU_Drawing
);
VideoCore
::
g_renderer
->
Rasterizer
()
->
DrawTriangles
();
VideoCore
::
g_renderer
->
Rasterizer
()
->
DrawTriangles
();
if
(
g_debug_context
)
{
if
(
g_debug_context
)
{
g_debug_context
->
OnEvent
(
DebugContext
::
Event
::
FinishedPrimitiveBatch
,
nullptr
);
g_debug_context
->
OnEvent
(
DebugContext
::
Event
::
FinishedPrimitiveBatch
,
nullptr
);
...
...
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