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    dynarmic: Update to 6b4c6b0 · 32d127ad
    MerryMage authored
    6b4c6b0 impl: Update PC when raising exception
    7a1313a A64: Implement FDIV (vector)
    b2d781d system: Raise exception for YIELD, WFE, WFI, SEV, SEVL
    b277bf5 Correct FPSR and FPCR
    7673933 A64: Implement USHL
    8d0e558 A64: Implement UCVTF (vector, integer), scalar variant
    da9a4f8 A64: Partially implement FCVTZU (scalar, fixed-point) and FCVTZS (scalar, fixed-point)
    7479684 A64: Implement system register TPIDR_EL0
    0fd75fd A64: Implement system registers FPCR and FPSR
    31e370c A64: Implement system register CNTPCT_EL0
    9a88fd3 A64: Implement system register CTR_EL0
    1d16896 A64: Implement NEG (vector)
    3184edf IR: Add IR instruction ZeroVector
    31f8fbc emit_x64_floating_point: Add maybe_unused to preprocess parameter
    567eb1a A64: Implement FMINNM (scalar)
    c6d8fa1 A64: Implement FMAXNM (scalar)
    616056d constant_pool: Add frame parameter
    a3747cb A64: Implement ADDP (scalar)
    5cd5d9f reg_alloc: Only exchange GPRs
    dd0452a A64: Implement DUP (element), scalar variant
    e5732ea emit_x64_floating_point: Correct FP{Max,Min}{32,64} implementations for -0/+0
    40eb9c3 A64: Implement FMAX (scalar), FMIN (scalar)
    7cef39b fuzz_with_unicorn: QEMU's implementation of FCVT is incorrect
    826dce2 travis: Switch unicorn repository
    9605f28 a64/config: Allow NaN emulation accuracy to be set
    e9435bc a64_emit_x64: Add conf to A64EmitContext
    30b596d fuzz_with_unicorn: Explicitly test floating point instructions
    be292a8 A64: Implement FSQRT (scalar)
    3c42d48 backend_x64: Accurately handle NaNs
    4aefed0 fuzz_with_unicorn: Print AArch64 disassembly
    32d127ad
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