From 210620ff314c774cd0da5a6b50501dec45914751 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Mon, 17 Dec 2018 18:49:48 -0300
Subject: [PATCH] shader_decode: Implement ISCADD
---
.../shader/decode/arithmetic_integer.cpp | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp
index d01336e0ef..d494af736f 100644
--- a/src/video_core/shader/decode/arithmetic_integer.cpp
+++ b/src/video_core/shader/decode/arithmetic_integer.cpp
@@ -41,6 +41,21 @@ u32 ShaderIR::DecodeArithmeticInteger(BasicBlock& bb, u32 pc) {
SetRegister(bb, instr.gpr0, Operation(OperationCode::IAdd, PRECISE, op_a, op_b));
break;
}
+ case OpCode::Id::ISCADD_C:
+ case OpCode::Id::ISCADD_R:
+ case OpCode::Id::ISCADD_IMM: {
+ UNIMPLEMENTED_IF_MSG(instr.generates_cc,
+ "Condition codes generation in ISCADD is not implemented");
+
+ op_a = GetOperandAbsNegInteger(op_a, false, instr.alu_integer.negate_a, true);
+ op_b = GetOperandAbsNegInteger(op_b, false, instr.alu_integer.negate_b, true);
+
+ const Node shift = Immediate(static_cast<u32>(instr.alu_integer.shift_amount));
+ const Node shifted_a = Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, op_a, shift);
+ const Node value = Operation(OperationCode::IAdd, NO_PRECISE, shifted_a, op_b);
+ SetRegister(bb, instr.gpr0, value);
+ break;
+ }
case OpCode::Id::SEL_C:
case OpCode::Id::SEL_R:
case OpCode::Id::SEL_IMM: {
--
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